The invention relates to a picture display device including a field number conversion circuit converting a first television signal having a first field frequency into a second television signal having a second field frequency, and including a synchronizing signal conversion circuit deriving second horizontal and vertical synchronizing signals of the second television signal from first horizontal and vertical synchronizing signals of the first television signal, and comprising:
a phase-locked loop including an oscillator which generates a signal at a frequency which is a multiple of the first horizontal synchronizing signal (H1) and which is phase-locked to said first horizontal synchronizing signal, the second horizontal synchronizing signal (H2) being derived from an output signal of the oscillator, and
a frequency divider circuit by means of which the second vertical synchronizing signal (V2) is derived from the first vertical synchronizing signal (V1), said circuit having an input which is coupled to an output of the oscillator.
A picture display device of this type is known from the PCT Application No. WO 80/02351. The frequency divider circuit of the picture display device described in that Application is adapted to process standard television signals with a standard number of lines per field. If television signals with a number of lines per field deviating from the standard are applied to this circuit, such as television signals from video recorders and video games, disturbing effects, such as a rolling picture or vertical jitter, occur.